IEEE-1012

System, Software, and Hardware Verification and Validation

Defines processes for verification and validation (V&V) of systems, software, and hardware. Specifies V&V tasks, inputs, outputs, and activities mapped to integrity levels and lifecycle phases.

Document
IEEE 1012-2016
URL
https://standards.ieee.org/ieee/1012/5609/
Label
Standard
Keywords
verification and validation V&V integrity levels lifecycle phases software assurance hardware verification

Domain: Software Engineering · Standard